1. Field of the Invention
The present invention relates to a circuit for driving a pair of power field effect transistors, FETs, and more particularly to a circuit for operating such power FETs which form a half-bridge inverter, the power FETs being of the n-channel, enhancement type, from a single pulse signal.
2. Description of the Prior Art
Many products require conversion from AC power to DC power and there are many and varied forms of circuits and devices to implement this conversion. One form of such a circuit is an inverter which uses semiconductor devices operating as switches. One relatively new type of switching device for use in such inverter circuits is the power field effect transistor, the power FET. The power FET is a semiconductor device which behaves as a variable resistor between two terminals (source and drain) and is controlled by a third terminal (gate). The gate is isolated from the two power terminals by a dielectric film or oxide which causes an inherent capacitor to be formed. For all practical purposes, the response of the main terminal resistance is instantly varied by the electric field established by the gate terminal when a voltage is applied to the gate. This device has some unique operating characteristics which make it particularly suitable for high frequency converters. These characteristics include very high speed and virtually infinite input impedance. Because the power FET is a voltage controlled device, this as compared to a conventional bipolar transistor which is a current controlled device, inverters previously designed using bipolar devices must be significantly modified to take full advantage of the features of the new power FETs.
It is desirable therefore to provide a high effiency, high speed, drive circuit for controlling operation of at least a pair of power FETs in an inverter from a single pulse signal so as also to avoid simultaneous conduction--shoot-through.
Accordingly, it is an object of the present invention to provide a circuit for driving at least a pair of power FETs in an inverter from a single pulse signal such that high efficiency and high speed are accomplished while shoot-through is avoided.